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Competition Awards

• 2024 Biren Technology “Flying Cup” GPU Programming Challenge — National First Place · 40,000 RMB · Jul. 2024 – Aug. 2024.
  • GPU-based development of AI operators(TopK, ReduceMean) with performance-optimized CUDA kernels and system-level integration.
  • 2024年壁仞科技“飞翔杯”GPU编程大赛 全国第一名 · 40000元。
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• 2023 “Fudan Electronics Cup” National College Electronic Design Competition — National First Prize · 20,000 RMB · May 2023 – Aug. 2023.
  • MLIR-based compiler development for AI model quantization and deployment on embedded platforms.
  • 2023年复旦微全国大学生电子设计大赛 软硬件赛道 全国一等奖 · 20000元。
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• The 5th National College IC Competition for Innovation and Entrepreneurship (CICC) — Second Prize of National Finals · 15,000 RMB · Mar. 2021 – Aug. 2021.
  • Led a team to develop a speech-controlled wireless smart helmet using a Xilinx FPGA and the IEEE 802.11ah protocol. Responsible for the hardware/software architecture, low-level hardware interfaces, Verilog-based speech recognition accelerator, RISC-V CPU integration, and SDK development.
  • 2021年第五届全国大学生集成电路创新创业大赛 国家级二等奖 · 15000元。

Honors

• Outstanding Graduate of Fudan University(复旦大学优秀毕业生), 2022
• Outstanding Student Award of Fudan University (复旦大学优秀学生), 2019
• Computer Software Copyright Registration (China), 1st student contributor (ID.2025SR2155561), 2025

Scholarship Awards

• Graduate First-Class Scholarship of Fudan University (复旦大学研究生一等奖学金), 2023, 2024
• University-Level First-Class Scholarship (Huawei Scholarship) of Fudan University (复旦大学校级奖学金一等奖（华为奖学金）), 2021
• University-Level Second-Class Scholarship of Fudan University (复旦大学校级奖学金二等奖), 2020
• University-Level First-Class Scholarship (Guanghua Scholarship) of Fudan University (复旦大学校级奖学金一等奖（光华奖学金）), 2019

Academic & Service Experience

• Co-Hosting Fusion SoC Tutorial-Workshop at FPT 2025 · Dec 2025
  • Hosted by Lingli Wang’s group, including Yuan Dai, Jiahang Lou, Jingyuan Li, Huan Lin, Guibin Zou, XinYu Cai and other team members.
  • International Conference on Field Programmable Technology (FPT 2025-workshop), ShanghaiTech University, Shanghai — link
• The 5th national College IC Competition for innovation and entrepreneurship (CICC) — Competition Technical Assistant · Feb. 2021 – Aug. 2021
  • One of the 17 technical assistants of the competition, responsible for the communication and coordination among the Alibaba T-head company, organizers of the contest and the participating teams, and answer technical questions for the contestants.
  • 第五届集创赛助理 获“优秀杯赛助理奖”

Education

• Ph.D. in Electronics Engineering — Fudan University, Shanghai, China · Sept. 2022 – Jun. 2027 (expected)
  • Supervisor: Prof. Lingli Wang (llwang@fudan.edu.cn)
• B.Sc. in Microelectronics — Fudan University, Shanghai, China · Sept. 2018 – Jun. 2022

Internship

• ByteDance, Shanghai-AI Chip-AI Software Stack Intern· Jan. 2026 – Present.
  • Explore LLM-oriented accelerator system via simulation and profiling, analyzing compute/communication trade-offs and GPU/NPU workload characteristics for LLM training and inference.
  • Explore accelerator architecture and software–hardware co-design for AI systems, including NoC interconnects, chiplet-based integration, and 3D-stacked architectures.
  • Built a Triton-based simulation flow from Triton IR to event-level simulation and NoC simulation, modeling collective communication operators such as allgather, reducescatter, and broadcast.
  • Contribute to domain-specific language (DSL) design for chiplet-based many-core architectures, focusing on automatic sharding, layout inference, and communication-computation fusion for large-scale distributed AI workloads.
• AMD (Advanced Micro Devices), Shanghai — GPU Post Silicon Intern – Semi-Custom Business Unit (SCBU)· Aug. 2021 – Jan. 2022
  • Developed Python-based tools and infrastructure for post-silicon validation and internal server platforms.
  • Built a runtime power monitor for key on-board nodes using STM32 and ADC chips.

News

• May 2026 — Our ISEDA 2026 paper has been selected as a Best Paper Candidate.
• May 2026 — We will give an on-site demo at ISCAS 2026 (Shanghai) of deploying CGRA on FPGA to support diverse workloads, including Llama inference—a small “continue-your-story” LLM deployment demo. Come and try our storytelling experience and the full toolchain in Shanghai! Special thanks to Jianrong for the close collaboration and huge contributions!
• Mar 2026 — Our paper has been accepted by ISEDA 2026. Special thanks to Jiayao for the great collaboration!
• Jan 2026 — Our work Live Demonstration: an Agile FPGA-Overlayed CGRA SoC for High-Efficiency Computing has been accepted by ISCAS 2026.
• Jan 2026 — Joined ByteDance’s AI chip team as an intern, contributing to the software stack for LLM acceleration.

• Dec 2025 — Co-hosting “Fusion SoC tutorial-workshop” at FPT 2025 (ShanghaiTech University) on Dec 2. Come play with our CGRA toolchain! See https://fpt-2025.lin.pub

• Nov 2025 — Shared a Chinese interpretation of the FPGA2025 best paper, FlightVGM: Video-Generation Model Deployed on FPGA, on Zhihu. Read more
• June 2025 — Scheduled to deliver an oral presentation at DAC 2025. See ya in San Francisco!
• Feb. 2025 — Our CGRA compiler work has been accepted by DAC 2025.
• Sep. 2024 — Achieved first place nationwide in the Biren “Flying Cup” GPU Programming Competition. Thanks to Zewei for the hard work and great collaboration! (壁仞科技“飞翔杯”GPU编程挑战赛全国第一名) link.

Publications

2026

• LoRA: Towards Improved Applicability of Reconfigurable Architecture for Versatile Nonlinear Functions(Accepted). Yuan Dai, Guibin Zou, Yuanda Yang, Huan Lin, Jiahang Lou, Yiwen Luo, Xinyu Cai, Wenbo Yin, Wai-Shing Luk, Lingli Wang. 53rd Annual International Symposium on Computer Architecture (ISCA 2026).

• An MLIR-Based Compilation Flow for CGRAs: Optimized CDFG Generation, Control-Flow Handling, and Scalability(Accepted). Jiahang Lou, Jiayao Hu(Co-first), Jianrong Zhang, Yikuan Chen, Zewei Zhong, Yuan Dai, Wenbo Yin, Lingli Wang, Yu He, Qing He. International Symposium of EDA (ISEDA 2026), Singapore, 2026. Best Paper Candidate.

• Live Demonstration: an Agile FPGA-Overlayed CGRA SoC for High-Efficiency Computing. Jiahang Lou, Jianrong Zhang(Co-first), Yuan Dai, Zewei Zhong, Huan Lin, Wenbo Yin, Lingli Wang. 2026 IEEE International Symposium on Circuits and Systems (ISCAS 2026), Shanghai, China

2025

• Adora Compiler: End-to-End Optimization for High-Efficiency Dataflow Acceleration and Task Pipelining on CGRAs. Jiahang Lou, Qilong Zhu, Yuan Dai, Zewei Zhong, Wenbo Yin and Lingli Wang. Design Automation Conference (DAC 2025), San Francisco, USA. paper

2024

• MDCRA: A Reconfigurable Accelerator Framework for Multiple Dataflow Lanes. Shaoyang Sun, Boyin Jin, Jiahang Lou, Jiangnan Li, Yuhang Cao, Jingyuan Li, Chen Shen, Yuan Dai, Wenbo Yin, Wai-Shing Luk, Lingli Wang. 35th IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP 2024), Hong Kong, China. paper

• CFEACT: A CGRA-based Framework Enabling Agile CNN and Transformer Accelerator Design. Yiqing Mao, Xuchen Gao, Jiahang Lou, Yunhui Qiu, Wenbo Yin, Wai-Shing Luk, Lingli Wang. 34th International Conference on Field-Programmable Logic and Applications (FPL 2024), Torino, Italy. paper

• An Agile Deploying Approach for Large-Scale Workloads on CGRA-CPU Architecture. Jiahang Lou, Xuchen Gao, Yiqing Mao, Yunhui Qiu, Yihan Hu, Wenbo Yin, Lingli Wang. Design, Automation & Test in Europe Conference & Exhibition(DATE 2024), Valencia, Spain. paper

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An Agile Deploying Approach for Large-Scale Workloads on CGRA-CPU Architecture

Published in Design, Automation & Test in Europe Conference & Exhibition (DATE 2024), Valencia, Spain, 2024

Jiahang Lou, Xuchen Gao, Yiqing Mao, Yunhui Qiu, Yihan Hu, Wenbo Yin and Lingli Wang.

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MDCRA: A Reconfigurable Accelerator Framework for Multiple Dataflow Lanes

Published in 35th IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP 2024), 2024

Shaoyang Sun, Boyin Jin, Jiahang Lou, Jiangnan Li, Yuhang Cao, Jingyuan Li, Chen Shen, Yuan Dai, Wenbo Yin, Wai-Shing Luk, Lingli Wang.

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CFEACT: A CGRA-based Framework Enabling Agile CNN and Transformer Accelerator Design

Published in 34th International Conference on Field-Programmable Logic and Applications (FPL 2024), 2024

Yiqing Mao, Xuchen Gao, Jiahang Lou, Yunhui Qiu, Wenbo Yin, Wai-Shing Luk, Lingli Wang.

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Adora Compiler: End-to-End Optimization for High-Efficiency Dataflow Acceleration and Task Pipelining on CGRAs

Published in Design Automation Conference (DAC 2025), San Francisco, USA, 2025

Jiahang Lou, Qilong Zhu, Yuan Dai，Zewei Zhong, Wenbo Yin and Lingli Wang.

Download Paper

Hosting Fusion SoC Tutorial-Workshop at FPT 2025 link

Published in International Conference on Field Programmable Technology Workshop (FPT 2025-workshop), ShanghaiTech University, Shanghai, 2025

Hosted by Lingli Wang’s group, including Yuan Dai, Jiahang Lou, Jingyuan Li, Huan Lin, Guibin Zou, XinYu Cai and other team members.

Download Paper

Talk 1 on Relevant Topic in Your Field

Published: March 01, 2012

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Tutorial 1 on Relevant Topic in Your Field

Published: March 01, 2013

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Published: February 01, 2014

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Conference Proceeding talk 3 on Relevant Topic in Your Field

Published: March 01, 2014

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Teaching experience 1

Undergraduate course, University 1, Department, 2014

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Teaching experience 2

Workshop, University 1, Department, 2015

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